There's definitely more than "hypothetical interest" on this notion. The RCS/RI have several MASSBUS machines (including a 1090 and a 2020) that we'd really rather run with simulated rotating memory than the "original article". In fact, we began preliminary work on hardware emulators back around 2000 or so, but due to the nature of the resources available never really got past the tentative design stage.

MASSBUS, as it turns out, was a really advanced design for its day. It's a pity that DEC never opened it up the way that they did other interconnect architectures.

Do let the assembled masses know if there's been substantial progress!